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Nexus 2-port QSFP28 SmartNIC+ / Each

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$8595.11 20% Off $10743.89
  • Mfr. Part Number: NXN-V5P-8X-9GB=
  • Alt. PN: NXNV5P8X9GB=
  • Manufacturer: Cisco
  • UPC: 889728321211
  • SKU: 2959657 (45)
  • Stock: Out of Stock
  • Days to Ship: 1 Days
  • Weight: 1.05 lbs.
Cisco Nexus NXN-V5P-8X-9GB V5P FPGA Application SmartNIC w 9G DDR4 10G 2x QSFP28 1-year warranty (NXN-V5P-8X-9GB) The Cisco Nexus NXN-V5P-8X-9GB, V5P FPGA Application SmartNIC is an FPGA-based network application card, specifically optimized for low-latency and high-density data-center applications. The SmartNIC adapters are equipped with a powerful 16nm Xilinx Virtex UltraScale Plus (VU5P) FPGA with up to 1.3M logic cells, packaged into a compact, production- ready, half-height, half-length, PCIe 8x form factor. With an extensive memory hierarchy for complex, memory intensive applications, it includes 36Mbit of block RAM and 133Mbit of UltraRAM on chip for low-latency access. The Cisco Nexus V5P FPGA Application SmartNIC incorporates an additional 18MB of QDR IV SRAM (30ns access latency using Cisco Nexus QDR controller IP1), and 9GB of DDR4 DRAM for high throughput access. The DRAM is accessible via a 72-bit-wide bus for maximum performance. Dual QSFP28 ports provide up to 200Gbps of full duplex connectivity. The dual QSFP28 cages offer high-speed 2x40GbE or 2x100GbE connectivity. Using QSFP/QSFP28 breakout cables expands the connectivity to 8x10GbE/25GbE connections. This high-density connectivity enables a range of high-performance, directly connected network applications, bypassing the need for traditional switching and multiplexing requirements. Cisco is a specialist in low-latency, high-performance FPGA IP cores. We provide to you the same high-speed, low-latency IP blocks used in our industry-leading products, including: ● 10GbE PCS/MAC with ultra-low latency performance ● Low-latency, high-throughput PCIe (Gen 3) DMA engine ● Timing, signaling, and register interfaces, including I2C ● Packet field extractor and frame multiplexer (with source code) ● Asynchronous FIFO and CDC modules (with source code) A standard Linux driver as well as transparent TCP and UDP acceleration and low-level packet access. Like all SmartNICs, the V5P FPGA Application SmartNIC functions out of the box as a high-performance network adapter. The entire SmartNIC software library is available, including the sockets application acceleration system, and the libexanic direct userspace accesses API. Libexanic provides easy support for low-latency packet TX/RX, managing the FPGA state (through register access), and low-latency TCP/UDP-delegated sending operations for hybrid hardware/software applications. It also supports fast and easy firmware updates (without requiring reboots), and vital statistics monitoring (temperatures, voltages, light levels, fans, etc.).
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